Hardware Engineering Architect – High-Speed Board Design & FPGA Systems

Title: Hardware Engineering Architect — High-Speed Board Design & FPGA Systems

Location: Onsite Sunnyvale

Employment Type: Full-Time

++Role Summary++

We are seeking a Hardware Engineering Architect to lead the architecture and design of complex high-performance PCBs and hardware platforms supporting next-generation computing, networking, and silicon validation systems. This is a hands-on technical leadership role requiring deep expertise in high-speed I/O design, complex FPGA interfaces, and full-cycle board development from concept through bring-up and debug.

This role is ideal for someone who thrives in solving hard signal integrity problems, integrating dense multi-interface designs, and partnering closely with FPGA, silicon, and system teams.

++Key Responsibilities++

· Architect and design complex multi-layer PCBs for high-performance systems (evaluation platforms, prototype boards, test/validation systems)

· Lead high-speed interface design and integration including:

o PCIe, DDR, Ethernet, CXL, SerDes-based interfaces, and other high-bandwidth links

o Drive end-to-end board development:

o Requirements → architecture → schematic → layout guidance → fabrication → assembly → bring-up → debug

o Own interface definition and high-speed connectivity between FPGA, SoC/ASIC, memory, and external devices

o Partner with Signal Integrity / Power Integrity experts to ensure robust high-speed performance

o Support system bring-up, lab debug, and root-cause resolution using advanced lab equipment

o Collaborate cross-functionally with FPGA designers, silicon architects, mechanical, manufacturing, and validation teams

o Mentor other engineers and raise the overall design quality and execution speed of the organization

++Required Qualifications++

· Bachelor’s or Master’s degree in Electrical Engineering / Computer Engineering (or equivalent experience)

· 10 years of experience in hardware/board design for high-performance electronics (more for Principal/Architect level)

· Strong hands-on expertise in complex PCB architecture and board design

· Extensive experience with high-speed I/O and dense interfaces, such as:

· PCIe (Gen3/Gen4/Gen5/Gen6 preferred)

· DDR4/DDR5 (and related layout constraints)

· High-speed Ethernet (25G/50G/100G )

· SerDes-based links and multi-gigabit interfaces

· Advanced FPGA interface knowledge:

· High-speed transceivers (GTY/GTH, etc.)

· Timing considerations and I/O standards

· Board-level connectivity for high-throughput FPGA systems

· Strong understanding of SI/PI fundamentals:

· Impedance control, vias, return paths, crosstalk, reference plane strategy, decoupling

· Experience with board bring-up and debug:

· Oscilloscopes, logic analyzers, TDR, VNAs, protocol analyzers, power rail validation

++Preferred / Nice-to-Have Skills++

· Architecture experience with evaluation boards, silicon validation boards, or emulation/prototyping platforms

· Experience with compute/storage/networking systems or data center HW

· Familiarity with CXL, retimers, clocking architectures, and signal conditioning

· High-current power system architecture (multi-rail power, PMICs, POL regulators)

· Hands-on experience with:

o Allegro, Altium Designer, OrCAD/Capture, Xpedition, or similar EDA tools

o Exposure to manufacturing readiness:

o DFM/DFT, test points, boundary scan/JTAG strategy, yield feedback loops

++What Success Looks Like++

· Designs are stable and high quality on first spin (or minimal re-spin)

· High-speed links meet performance targets with clean eye margins

· Faster bring-up cycles and reduced integration risk across teams

· Strong collaboration and leadership across HW, FPGA, and silicon orgs