Silicon Design Verification Engineer (III)
Location: California City, CA
Salary: $97.00 USD Hourly – $110.00 USD Hourly
Description: Our client is currently seeking a Silicon Design Verification Engineer (III)
Job Title : Silicon Design Verification Engineer (III)
Location : Goleta, CA
Worksite : Remote
Duration : 6 Months
Job Description:
You act as a Design Verification subject-matter specialist and utilize comprehensive knowledge of Silicon engineering activities to deliver verified designs on schedule.
Responsibilities include:
- Drive test plan development, including verification strategy, environment, components, stimulus, checks, and coverage, ensuring documentation is clear and usable.
- Work closely with architecture and designers to verify functional correctness of logic design.
- Collaborate with cross-functional teams to debug failures and provide quality solutions.
- Apply verification techniques, methodologies, tools, and languages (e.g., SystemVerilog) to drive design verification.
Minimum role qualifications:
- SV Coding Skills
- Simulation-based Verification Techniques and Methodology
- Scripting and infrastructure
- Domain-specific knowledge
- Testbench components and techniques
- UVM Coding Skills
- SVA Coding Skills
- Formal Verification Techniques and Methodology
- Communication and comprehension
- Problem-solving
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