PD Engineer
Role: PD Engineer
Location : Phoenix, AZ
Type: Onsite
Contract: 06+ Months
Summary:
EMIR engineer with 8+ years of expertise inf full-chip and block-level power planning and EMIR analysis using Redhawk-SC. The candidate should possess strong technical skills in RedHawk-SC, PTPX and Verdi, along with proficiency in TCL and Python scripting. This role involves driving power integrity sign-off, analyzing complex vector-based EMIR simulations and reports of various power conditions and collaborating with cross-functional teams to ensure robust chip-level power delivery.
Key Responsibilities:
- Perform full-chip and block level EMIR analysis using RedHark-SC, ensuring that design compliance with power integrity specifications
- Conduct power planning and analysis for SOC-level and identifying IR/EM issues and providing solutions
- Execute vector-based analysis using RTL/gate level FSDB/VCDs, and interpret results for optimization.
- Perform power analysis using Synopsys PrimeTime PX (PTPX) and/or PrimePower for dynamic and leakage estimations
- Utilize waveform debug tools such as Verdi for vector debugging
- Collaborate with RTL, Physical design, and Power teams to improve power grid robustness and optimize delivery network (PDN)
- Automate EMIR workflow, report generation, and data extraction using TCL and/or Python scripts
- Drive sign-off closure for EMIR and power integrity across multiple design blocks and ensure adherence to project schedules
- Provide technical guidance and mentoring to junior engineers in Power/EMIR analysis methodologies and tool usage.
Key Skills: EMIR, Redhawk-SC, TCL and Python scripting